Wave Issue 2003 1/19/00 Article 4-01

***Free EDA Tool Automates Logic Design for Embedded Systems With
External Memory and Logic
(January 18)

Waferscale Integration has introduced an EDA tool that allows
embedded system designers to add external memory and accompanying
logic to their systems without doing any logic design at all.
PSDsoft Express automatically generates all required logic
equations for PSD devices from input that the designer provides
using point-and-click dialog boxes in the tool.

PSDsoft Express eliminates the need for embedded system designers
to design any of the required logic for memory decoding,
segmentation, paging, chip selects, or pin assignments that is
required when external memory is added to the design. Used in
conjunction with Waferscale's PSD microcontroller support ICs,
PSDsoft Express generates all the logic equations based on point-
and-click menus in the tool. This process is transparent to the
user. The logic is guaranteed to be syntactically correct and the
tool prevents incorrect pin-assignments and/or overlapping memory
addresses - both fairly common problems when external memory is
used.

PSDsoft Express leads the designer through the entire design
process. Upon defining a project, the designer is provided a menu
with a selection of MCU architectures from which he/she chooses
one. The tool automatically assigns the control signals
appropriate to the MCU architecture. On the same menu, the
designer selects the PSD device that will be used in the system.
Only PSDs that are appropriate for the selected MCU design are
accessible via the dialog box.

The next step in the PSD design process is the assignment of the
I/O pins. All pins are shown on a dialog box. All standard pin
connections to the particular MCU are defined. The designer then
defines other pins by clicking on them, naming the pins, and
defining their function from a dialog box to the right. Pins may
be used as PLD inputs (logic input, or latched address), PLD
outputs (external chip select), in MCU I/O mode, as latched
address out, dedicated JTAG, or other specialty functions. The
dialog box shows only the options that are available for each
pin. Once a pin as been defined, PSDsoft Express prevents it from
being given a duplicate assignment. As a result, the designer is
prevented from making erroneous or duplicate pin assignments.

Eight-bit CISC microcontrollers have addressable memory that is
limited to only 64 Kbytes. Some microcontrollers provide extra
pins on the MCU that can be used to access additional memory by
sacrificing I/O pins and writing additional firmware. PSD devices
provide a page register whose outputs feed into the PSD address
decoder as an integral part of the chip select equations. This
architecture supplies flexibility because memory is efficiently
paged and even swapped on a segment by segment basis, at any
address boundary. If not used for memory paging, the page
register bits can also be used to implement custom logic. The
designer simply clicks on either the paging or the logic function
for the appropriate page register bit in the dialog box, and
types in the name of the logic signal.

In-application Programming requires two independent memories, one
to execute from while erasing and programming the other.
Implementing IAP with standard flash memory and decoding logic
can be tricky, especially with 8-bit MCUs that only have a tight
64 KByte address space to begin with. PSD silicon architecture
and PSDsoft express allow flexibility in memory mapping. Up to
three independent internal PSD memory arrays can be mapped
segment-by-segment at any address boundary with built-in support
for memory paging and swapping. Quite often, designers want to
swap boot and IAP code out of the memory map after IAP is
complete. Result - flexibly with no wasted address space.

In order to effect MCU-controlled in-application programming,
firmware that includes the programming algorithms must be swapped
to a memory location where it can be executed. Typically the
vendors of ISP memories provide generic algorithms in the data
book. Designers must implement the algorithms, usually writing
their own C-programs. This is a tedious and error prone process
that further extends the design cycle. PSDsoft Express generates
the C-code required to implement IAP and merges it with the
designer's application code. The C-code can then be cross-
compiled and linked with any other MCU firmware for execution.
This is a hands-off process that takes only a couple of seconds.
It saves much design time and prevents any errors that might
occur during a manual procedure.

Once this process is complete PSDsoft Express transparently
generates all the HDL that will be required for the MCU
interface, PSD configuration, pin assignment and memory paging.

PSDsoft Express merges the MCU firmware with the PSD
configuration information, based on information input via a code
mapping dialog box. The designer simply types in the file start
address, stop address and the file name for each memory block at
the location that shows the appropriate memory select equations.

PSDsoft ensures there is no conflict between the memory addresses
assigned to the PSD configuration and the microcontroller
firmware. This process must be done manually using conventional
design methodologies and is time consuming.

Intel Hex and Motorola S-record formats may be selected by
clicking on the appropriate button. Once these selections have
been made PSDsoft Express transparently merges the logic design
with the MCU firmware.

PSDsoft Express may be used to program the PSD in the system
using Waferscale's FlashLINK programmer via the PSD's ISP JTAG
interface, using a conventional EPROM programmer or using a
third-party programmer. Runs Under Microsoft Windows 95, Windows
98 or Windows NT - PSDsoft Express operates under Microsoft
Windows 95, 98 or NT operating systems. PSDsoft Express is free
of charge. It can be downloaded directly from Waferscale's web
site.

www.waferscale.com