Wave Issue 2000 1/3/00 Article 3-02

***ATI Research Silicon Valley Standardizes on Aristo's Block-
Based Design Planning Tool for Processor Design
(December 16)

Aristo Technology announced that ATI Research Silicon Valley will
standardize on the Aristo design planning tool, IC Wizard, for
its block-based processor design flow, replacing internally
developed design planning tools.

ATI Research is currently developing next-generation system-on-a-
chip (SOC) technology, a highly integrated product that
encompasses graphics, system logic, and processor blocks on a
single chip. These chips will be incorporated into Internet-
connected digital appliances, including low-cost personal
computers, set-top boxes, and Web companions.

ATI Research is the third Aristo customer to be announced within
the last four weeks. Aristo has begun shipping to ATI Research,
and the design house expects that it will complete conversion
from internal tools to IC Wizard by January 2000.

The decision by ATI Research to incorporate IC Wizard into its
design flow is significant in that the company had already
adopted a block-based approach to design planning, at a time when
commercial block-based tools were not available. Its internally
developed block-based tools, which are tuned for very high-
performance, high-complexity SOC design, had provided the
company's design team with a higher level of abstraction with
which to control and accelerate timing convergence. ATI Research
had determined that this level of abstraction was essential to
meet its time-to-market requirements.

Once commercial block-based design planning tools were announced
this year, ATI Research decided to replace its internal tools, so
it could reallocate its internal engineering resources to design
rather than to tool development and support.

IC Wizard¹s design planning and assembly tools accelerate design
convergence and increase design productivity through a highly
automated block-based, or "divide and conquer," approach. IC
Wizard generates multiple design plan alternatives that meet
constraints for timing, area, routability, and power in days as
compared to the months it typically takes using traditional
methodologies. The tool can be used during the architectural,
RTL, structural, and physical design stages, and plugs into
existing design flows, so customers can use it for their design
needs and preserve their investment in existing tools.

www.aristotech.com/